1. Field of the Invention
The present invention relates to integrated circuits. More specifically, the present invention relates to a method and an apparatus for providing a selectable resistor and/or driver for an integrated circuit that provides a substantially linear resistance.
2. Related Art
As computer system performance continues to increase at an exponential rate, communications between semiconductor chips that make up a computer system must take place at the fastest possible rate. Inter-chip communication speeds can be limited by noise caused by reflections on the signal lines between the chips. A reflection is typically caused by an impedance mismatch between the signal line and a receiver or a driver at an end of the signal line.
An impedance mismatch can be corrected by terminating the end of the signal line with one or more termination resistors. It is possible to use a transistor on a semiconductor chip as a termination resistor. However, transistors tend to have highly nonlinear impedance characteristics, which means that the impedance of a transistor changes as the voltage on the signal line changes. As this impedance changes, the transistor becomes less effective at eliminating reflections.
This nonlinearity problem can be rectified by using a current-source-connected transistor 204 in parallel with a diode-connected transistor 202 as is illustrated in FIG. 2A. Note that Vcsn is a current source reference voltage that can be used to vary to impedance of current-source connected transistor 204. By coupling current-source-connected transistor 204 in parallel with diode-connected transistor 202, a substantially linear impedance is produced as is illustrated by the graph showing I-V curves in FIG. 3. In FIG. 3, the impedance of a diode-connected transistor 302 is combined with the impedance of a current-source-connected transistor 304 to produce a combined resistance 306 that is substantially linear.
Unfortunately, the circuit illustrated in FIG. 2A has a number of shortcomings. Once the semiconductor chip is fabricated, the transistors are fixed in silicon. Hence, it is not possible to adjust the impedance of the circuit illustrated in FIG. 2A to adjust for different signal line impedances and to adjust for manufacturing process variations that can cause the impedance of the transistors to change. Moreover, the circuit illustrated in FIG. 2A is not practical for terminating a CMOS driver, because it always remains active. Hence, if the termination resistor is used to terminate the output of a driver to VDD, the termination resistor continues to pull the output toward VDD, even when the output is driven to a low voltage.
What is needed is an method and an apparatus for providing a linear termination resistance on a semiconductor chip without the above-described problems.
One embodiment of the present invention provides resistor within an integrated circuit with a substantially linear resistance. This resistor includes a diode-connected transistor coupled in parallel with a current-source-connected transistor, so that a nonlinear resistance of the diode-connected transistor combines with a nonlinear resistance of the current-source-connected transistor to produce a substantially linear combined resistance. It also includes selection circuit that is configured to selectively deactivate the resistor by deactivating the diode-connected transistor and the current-source-connected transistor. This selection circuit provides a range of possible resistance values, and thus enables the resistance to be quickly switched on and off to allow for use in a high-speed driver circuit.
In a variation on this embodiment, the gate of the diode-connected transistor is coupled to the source of the diode-connected transistor when the diode-connected transistor is active.
In a variation on this embodiment, the gate of the current-source-connected transistor is coupled to a current source reference voltage when the current-source-connected transistor is active.
In a variation on this embodiment, the diode-connected transistor is an NMOS transistor with a source input coupled to ground, and the current-source-connected transistor is an NMOS transistor with a source input coupled to ground. In a further variation, the selection circuit is configured to deactivate the diode-connected transistor by coupling the gate of the diode-connected transistor to ground, and the selection circuit is configured to deactivate the current-source-connected transistor by coupling the gate of the current-source-connected transistor to ground.
In a variation on this embodiment, the diode-connected transistor is a PMOS transistor with a source input coupled to VDD, and the current-source-connected transistor is a PMOS transistor with a source input coupled to VDD. In a further variation, the selection circuit is configured to deactivate the diode-connected transistor by coupling the gate of the diode-connected transistor to VDD, and the selection circuit is configured to deactivate the current-source-connected transistor by coupling the gate of the current-source-connected transistor to VDD.
In a variation on this embodiment, the selection circuit is controlled by a selection signal.
In a variation on this embodiment, the resistor includes a fixed linear resistance, which is not affected by the selection circuit, coupled in parallel with the diode-connected transistor and the current-source-connected transistor. This fixed linear resistance includes, a second diode-connected transistor, and a second current-source-connected transistor coupled in parallel with the second diode-connected transistor.
One embodiment of the present invention provides a driver circuit with a substantially linear resistance. This driver circuit includes an input that receives an input signal and an output. It also includes a pullup circuit that pulls the output to VDD. This pullup circuit includes a diode-connected PMOS transistor and a current-source-connected PMOS transistor coupled in parallel with the diode-connected PMOS transistor, so that a nonlinear resistance of the diode-connected PMOS transistor combines with a nonlinear resistance of the current-source-connected PMOS transistor to produce a substantially linear combined resistance. The driver circuit also includes a pulldown circuit that pulls the output to ground. This pulldown circuit includes, a diode-connected NMOS transistor and a current-source-connected NMOS transistor coupled in parallel with the diode-connected NMOS transistor so that a nonlinear resistance of the diode-connected NMOS transistor combines with a nonlinear resistance of the current-source-connected NMOS transistor to produce a substantially linear combined resistance. The driver circuit also includes a selection circuit that is configured to activate the pullup circuit and deactivate the pulldown circuit when the input signal exceeds a threshold voltage. The selection circuit is also configured to deactivate the pullup circuit and activate the pulldown circuit when the input signal falls below the threshold voltage.
In a variation on this embodiment, the selection circuit additionally receives a pullup select signal and a pulldown select signal. The selection circuit is configured to enable the pullup circuit when the pullup select signal is asserted, and to enable the pulldown circuit when the pulldown select signal is asserted.
One embodiment of the present invention provides a driver circuit with a substantially linear resistance. A set of selectable pullup circuits are configured to pull the output of the driver circuit to VDD. Each selectable pullup circuit includes, a diode-connected PMOS transistor and a current-source-connected PMOS transistor coupled in parallel with the diode-connected PMOS transistor so that a nonlinear resistance of the diode-connected PMOS transistor combines with a nonlinear resistance of the current-source-connected PMOS transistor to produce a substantially linear combined resistance. Each selectable pullup circuit also includes a pullup selection circuit for enabling the selectable pullup circuit in response to a pullup selection signal. A set of selectable pullup circuits are configured to pull the output of the driver circuit to ground. Each selectable pullup circuit includes, a diode-connected NMOS transistor and a current-source-connected NMOS transistor coupled in parallel with the diode-connected NMOS transistor so that a nonlinear resistance of the diode-connected NMOS transistor combines with a nonlinear resistance of the current-source-connected NMOS transistor to produce a substantially linear combined resistance. Each selectable pulldown circuit also includes a pulldown selection circuit for enabling the selectable pulldown circuit in response to a pulldown selection signal. In this embodiment, the selectable pulldown circuits and the selectable pullup circuits are independently selectable, so that the driver circuit can be configured to use a selectable number of pullup circuits and a selectable number of pulldown circuits.